With the increase in the volume of automotive electronics, safety requirements will become more stringent. The safety design and verification technology of digital circuits is relatively mature, but the analog aspect is not as mature. According to statistics, over 80% of on-site faults are caused by the analog or mixed signal parts of the product, and analog circuits are considered as "safety black boxes" outside the safety verification process.

However, in automotive electronics, in addition to digital chips, the usage of automotive analog chips is also significant. Taking a B-class new energy vehicle as an example, the usage of analog chips per vehicle is increasing from 160 for gasoline vehicles to nearly 400. In terms of overall market volume, according to data recently released by the Semiconductor Industry Association (SIA) of the United States, global chip sales broke records in 2022, reaching $573.5 billion, a year-on-year increase of 3.2%. Among them, analog chip sales increased the most, with a year-on-year increase of 7.5%, reaching $89 billion.http://www.ic-bom.com/

In addition, for one SoC, digital and analog parts will definitely be integrated internally. So the question arises, how can we achieve integrated security of analog/mixed signal and digital design? Where do safety hazards come from?

According to ISO 26262 standard, the purpose of conducting safety verification is to avoid two types of failures in automotive systems: one is systemic failure, which is decisive and inherent in the design; Another type is random failure, including permanent and instantaneous failures, which are not decisive and may be caused by usage conditions.http://www.ic-bom.com/

In fact, like other industries, in order to systematically avoid some security risks, in addition to having a strong sense of security, we also need to rely on mechanisms and process specifications to assist. Therefore, in the ISO 26262 standard, a FMEDA method is mentioned.

What is FMEDA? FMEDA is the abbreviation for Failure Mode Effects and Diagnostic Analysis in English, also known as Failure Mode Effects and Diagnostic Analysis. FMEDA is usually the first step in system security research, guiding engineers to complete the safety design, verification, and optimization of hardware components and their subcomponents through accurate evaluation in the early stages of the design cycle. While accelerating the chip launch cycle, it can also assist in reducing the risk and cost of chip design and manufacturing.

For the FMEDA process, there are three key stages: firstly, architectural FMEDA is used for early estimation of chipless design data; Secondly, a detailed FMEDA, with a complete RTL or netlist, calculates the basic failure rate based on the designed and estimated diagnostic coverage; Thirdly, FMEDA verification, based on RTL or netlist, calculates more accurate diagnostic coverage through formal analysis or simulation.

In order for a chip to meet functional safety standards, in addition to security verification, it is also necessary to match implementation methods that balance security. And Cadence is providing a complete set of security solutions that work collaboratively in an integrated process and transfer security requirements from Genus Synthesis to Innovus Implementation P&R, accelerating the achievement of safety, quality, and reliability goals for automotive system level chips (SoCs).http://www.ic-bom.com/